Sujai Shivakumar: Can we – can we get back into the room and take our seats, please? I think we should probably get started. So I hope you had a chance to have some lunch.
It’s my pleasure now to introduce Dr. Eric Lin, who is the interim CHIPS Research and Development Program director at the Department of Commerce. Until joining the CHIPS For America R&D Program, Dr. Lin was the director of the Material Measurement Laboratory – MML – at NIST. And he has also served as the acting associate director for laboratory programs at NIST, where he provided direction and operational guidance for all of this scientific and technical laboratories, among other duties.
So please join me in welcoming Dr. Eric Lin, who will present his vision and strategy for the National Semiconductor Technology Center. Thank you. (Applause.)
Eric Lin: Thank you very much, Sujai. Thanks, everyone, for being here. And thank you for the kind invitation to share what is not just myself but certainly a whole team at Commerce working on the CHIPS R&D Office programs. And just last week we released a vision and strategy paper for the National Semiconductor Technology Center, a key component for the CHIPS R&D Program.
Before I get started into reviewing, to just giving you the quick overview of what the vision and strategy is for the NSTC, as we call it, I do just want to call attention to the theme of today’s meeting, “Enhancing the Regional Impact of the CHIPS and Science Act.” And I hope you’ll be able to see that through the different components of the vision and strategy for the NSTC that we certainly will be – there are certainly many places where regional innovation and regional activities are both critical to the success of the NSTC and the CHIPS Program overall. But also, there are certainly many mechanisms to be able to enhance and drive the effectiveness and the innovation space within different regions of the country.
OK, so this audience certainly doesn’t need a review of this, but I think it’s worth highlighting – (laughs) – that the CHIPS For America Act, two parts to 39 billion dollars for the manufacturing incentives. As I understand, a lot of discussion about that this morning. And $11 billion for the R&D programs, where we will be building four integrated programs to address the critical needs in terms of filling gaps within prototyping and ensuring that the ideas that are needed for the foundational technologies in semiconductor manufacturing are born here in the United States, developed, and reach scale here in the U.S. And I’ll say more about what we’re thinking about the overall program, while still emphasizing the NSTC.
And before I go on, of course, both programs are harmonized and focused on developing the workforce that is necessary not only to fill the jobs that are needed to build the fabs that are going to be constructed over the next few years, but also the workforce and the workforce ecosystem so that participants that join this industry can thrive within it, and find meaningful careers by staying within semiconductor manufacturing. We’re also working closely with our other agency partners to make sure that all the different efforts across the government are connected, and with as little friction as possible, and often working with each other, so that they can be elevated and supported in working harmoniously.
I think that’ll be a common theme as you hear, as there’s a lot of components to this program. There’s already so much energy in the country and around the world about both the importance – the critical importance of semiconductor technology, but also the opportunity for what is possible with how many other alternative technologies are dependent on chips and semiconductors that could be created. And so this theme of how can things be connected, how can things be amplified, how can ideas become reality much faster, are all unifying. And there’s no way for a technology as complex as semiconductors to do so without a complex set of capabilities, in this case, across the nation.
So for the CHIPS for America Act, the overall goal is to strengthen and advance U.S. leadership in R&D. So, again, our key goal is to – is to secure, provide – meet national security and economic security needs through, in this case, in our charge, as the U.S. remains a leader in the foundational technologies that are to come. The way we’re going to do it in the R&D program is to build an integrated ecosystem that drives this innovation. We have four major programs. The NSTC here at the top, and that will be the focus of the remainder of the remarks.
And we have three other programs, the National Advanced Packaging Manufacturing Program, Manufacturing USA Institutes, up to three, and the Metrology R&D Program centered on the core NIST mission, on measurement science. All of these programs have a distinct role to play within the semiconductor ecosystem, and how to elevate the technology overall. But it’s also very clear that there are pieces and components where the successful output from one program is a necessary input for the other, and vice versa. So the closer we integrate the ecosystem, the more likely we’ll have pathways for any idea to be able to make it into the commercial scale.
Now, not only do we need the programs to work together, but we need to be in close partnership with industry, academia, government, and allied and partner nations. The nature of the supply chain, as I’m sure was talked about this morning for semiconductors, is no less complex if you think about innovation as a supply-chain type of activity as well. And so what we need to do is we need to take advantage of the energy and the ideas that are already existing and help the most promising ones so that all can benefit.
In the design of these programs, we’ve been talking a lot with our stakeholders in the community. We’ve gotten a lot of input and incredible suggestions from many of you here in the audience. And what we are aiming to do is to take a very strategic view of the R&D infrastructure and the programs that are being developed specifically around what’s the value proposition for participants who will be participating in these programs and benefiting from these programs or perhaps wanting to receive and scale the output from these programs.
The last thing I want to inform – to note is that this effort is informed by Industrial Advisory Committee. So there’s 24 very distinguished individuals that represent a cross-section of the community, the semiconductor community. And they have been an incredible resource and taking a very close look and providing recommendations for the R&D program, not only for Commerce and CHIPS R&D, but across the government. And what has been truly spectacular is that they’ve been taking a national-interest point of view and really working hard so that the United States can achieve this goal of keeping innovation leadership here in the U.S.
OK, so for the NSTC, there are three basic challenges that we’ll be addressing. And so we’ll be looking at filling a resource gap that has been identified before the passage of the CHIPS Act around prototyping, testing and scaling. And so we need to fill this gap so that those facilities ae available at prices and availability so that the barriers which some companies are experiencing are reduced so that their ideas can be tested.
We also have identified barriers where researchers and developers, technology developers, do not have the type of access, ease of access, to test facilities, equipment, or digital-design tools and other resources where, if the barriers toward access and cost and time to those tools was reduced, then the number of ideas that could be expressed and the number of participants and ideas could be grown.
And then, without addressing these issues, while also collectively identifying the most important challenges that we need to address as a nation to lead the future of semiconductor technology, then we need to invest in the people and in the training so that those – the people who actually have the ideas can succeed.
Now, late last year we released a letter to the community about the NSTC. And so what we identified is the NSTC as a focal point for research and engineering throughout the semiconductor ecosystem and looking for this disruptive innovation that is on the most important technologies for the future. We outline a number of different broad areas, broad topics that we intended to address. And then the vision and strategy paper from last week goes into more detail into those pieces.
So if we’re successful with the NSTC, then by the decade’s end the NSTC should be viewed throughout the world as an essential resource within the broad semiconductor ecosystem with a network of respected scientists and engineers, state-of-the-art facilities, effective programs and demonstrated technical achievements.
And so I’ll preview a little bit. And we really intend this to be a national network and an ecosystem. What is really unprecedented about the CHIPS Act itself and the ambition of the NSTC within the R&D program is that the scope and scale – the dollar amounts are certainly unprecedented historically. The breadth of the technology space that we need to address is just incredibly large. And most importantly, the focus on semiconductor technology, a critical foundation and future for all – many technologies for the United States provides that focus so that it is a national-scale effort to bring and align and harmonize and scale this technology across the breadth of what the space covers.
So the ecosystem for those who have regional centers and already embarking on pushing innovation in semiconductor technology, then you can see the NSTC as an amplifier of those efforts. And what we need to do is to amplify locally promising areas that can be resources to the rest of the nation, and also to engage and include other parts of the nation where they can be starting to build other capabilities that we may need. The focus provided means that all of these activities need to be harmonized and aligned with a shared set of goals so that we will be able to keep the U.S. leadership in innovation.
Let me just quickly go through the top-line goals and I’ll just run quickly through the elements of it and just reserve time for any questions that you may have.
So the three top-line goals, the things we will be tracking to see if the NSTC is successful here. The first one, I’ve said many times, is that we are extending U.S. technology in the foundational – innovation in the foundational technology of the future. So although we are looking to increase the amount of research, we want more people to perform research, we want that research to become more accessible, a lot more cost-effective and faster. But the metric of success is the foundational technologies that have – in the future, five, 10, 15 years from now that we don’t know about yet – were developed and scaled here in the United States. That’s the metric of success.
The second goal, on the bottom left, is that we want to reduce the time and cost of moving an idea into the commercial scale, and so I identified some of the barriers before and so one of the things we’ll be tracking is, how much cheaper and faster is it for new ideas to enter the actual practice?
And the third goal is that none of this happens without people and so we need to build and sustain a semiconductor workforce-development ecosystem that looks at career pathways and not only at statistics of how many jobs remain to be filled. So if we need the innovators of the future, then we know we need to be able to have them come from any part of the country; it may be that they start in the trades and then find their way into becoming an innovator or an entrepreneur. And so building an ecosystem that is welcoming and thriving, full of opportunity is one that we can harmonize as a shared goal for the NSTC.
OK, so I’ll just go through some of the buckets of the types of programs that we envision the NSTC to cover, around technology leadership, community assets, and workforce.
So for technology leadership, this is really about bringing the community together and using the resources within the act for in-house and funded research, and we really are asking the NSTC to convene the community and have these discussions with representation from all across the industries, from the largest companies to the innovators, the smallest innovators and the ones with the farthest-reaching ideas, and to organize and develop important grand challenges and road maps, perhaps building on those that exist already, so that there’s an alignment of where the most important challenges lie in aligning the community together to go tackle them. There are other areas, like standards and protocols, creating a dynamic environment where ideas can be exchanged, where you might find a collaborator that will help you make the next leap in technology that you didn’t know existed, is the type and place and environment, along with the resources, that we want the NSTC to create.
Around community assets, there are a number of areas that we have heard from the community about. If there were shared resources to elevate all boats, as it were, a tide that elevates all the boats, in that if there is a pool of shared resources, then that lowers the barrier for entry for people who want to have new ideas, and so some ideas that are in the vision and strategy paper include a chiplet space; a design-enabling gateway, where access to design tools and the types of data and resources you might need can be at a much lower cost; data sets, which are extremely valuable if they are pre-competitive to enhance your competitive work, for example; and also physical assets, like technical centers, which will have the capabilities for prototyping research and experimentation and also create this environment where these ideas can be shared in a pre-competitive environment so that the ideas can be tested and then commercialized when they’re ready.
OK, so I’m going to need someone’s help with that window. OK, thank you.
On these technical centers – so these are physical assets, of which there’s a lot of discussion about, about what types of resources and facilities are most necessary. And the only thing I’ll point out here is that we have a category at the bottom which are more large-scale facilities for prototyping, such as a baseline CMOS R&D line, or an advanced packaging pilot facility that will be supported by the advanced packaging program, and this will have – these will be intersections of many different types of efforts that are pretty clear for what those purposes are.
And then we have a concept that has been suggested by many, many members of the community around technical centers that could be much more focused and organized around particular technology areas or different types of ideas. This is not an exhaustive list, it is not a fully representative list, and it’s not a prioritization list, but you can see things like memory, power, RF and analog, our design-tool focus, our bioelectronics. Like, these are just examples of where there may be a future benefit for there to be a center of capability that could draw and drive innovation.
The workforce programs are really to enhance this key idea I’m trying to describe, which is to harmonize the industry as well as the educational and training institutions so there can be an agreement on basic ideas of: What is a high-quality training program? How can we know that those training programs will lead to career success and effectiveness for the company? How can we ensure and find best practices so that there’s outreach to traditionally underrepresented groups? There are pockets all around the country who have no idea that semiconductor technology and the industry has all these opportunities for them – and then not only that first entry part, of course, but also to thrive and stay within the industry through career pathways.
We do envision that the NSTC is a major focal point and convening body, and so we would like essentially everyone to want to be and find value in being a part of the NSTC. Whether you are just learning about technology and just gaining access to ideas and what’s happening, all the way to the most experienced practitioners who can find resources and an environment where they can try out their most exciting ideas and be able to take that back into their own commercialization efforts. And so you can see this is basically an exhaustive – it is an exhaustive list of everyone we can think of to be able to both contribute and to benefit from the NSTC.
This chart is a little complicated, but the main thing we wanted to convey is that the government is working together to make sure that the different components – the ones that you heard about earlier today not only from NSF and DOD, but also in DOE and other agencies – and we are working earnestly and daily to make sure that those programs can be connected together so that they can be leveraged in ways that both benefit those resources as well as the members of the NSTC.
So the basic steps for how we’re going to get there is that also last week we released a Federal Register notice that – calling for nominations for a selection committee. And this selection committee will have one job, which is to nominate and build upward to incorporate the nonprofit that will become the NSTC. So if you haven’t seen that FRN, please go to CHIPS.gov. And if you have individuals that you think would help us with this task – which is to select a board, and that board will stand up the organization – it closes on May 10th next week. So please do send us who you think could do this – do the best job for that.
For other components to look forward, please go to CHIPS.gov. You can find out more updates on both the incentives and the R&D programs. The next things that we will have coming up are publishing the summary of the RFI responses for the manufacturing USA RFI. The metrology program is because – is about to get up and running and to be able to articulate their strategy and their plans. And then a lot more to come through the summer and into the fall.
OK, so thank you, again, very much for inviting me here. And certainly, there’s a lot of areas, I hope you can see, where regions can both participate and benefit and contribute to the overall focus that is the NSTC. Thank you very much. (Applause.)
OK, do we have time for some questions? OK. Yes, please.
Q: Yes. I think the natural question – a natural question that people would have is how is this different from SEMATECH? And I think, from what you’ve described, it sounds like it would be much broader, and much more connected to workforce development. Is that the case, or?
Dr. Lin: Yeah. I’d say, you know, the scope of the NSTC is far broader than SEMATCH overall. The other part is that the technology space today is just far more complex and integrated than it was in the original days, or even the ending days of SEMATECH as well. And the focus on SEMATECH was really heavy on the semiconductor technology companies themselves, and there was a greater range of them at that time within the chip production space. So times are different, as well as the size, and scale, and breadth, and ambitions are different.
We have learned a lot from SEMATECH. There were a lot of things SEMATECH was very successful in, and articulated a model for what benefits could come from that. And so we’re certainly taking those lessons to heart. But in general, yes, it’s inspired by SEMATECH and its accomplishments, but the scale, and ambition, and the size, and the focus for today’s day in age is very different.
Q: Thank you.
Dr. Lin: Yes.
Q: Eric, thank you very much for your leadership, your presentation today and, of course, your leadership. Innovation and manufacturing, R&D and manufacturing are closely connected in the innovation space. Can you say something about the relationship between the incentives – the incentive program and the R&D program, and how those two will work together, reinforce one another, and so forth?
Dr. Lin: Sure. So it’s not a – obviously not an accident that the incentives program and the R&D program were put together and put in the same agency as well. And certainly the secretary and Director Locascio have spoken a lot about the importance of if you don’t have actual manufacturing, then the innovation does start to decline, and that’s the coupling together that goes back and forth to each other. Certainly the incentives program is really focused on the short-term onshoring of fab facilities in the U.S. And the value proposition for R&D is to make sure that’s sustained and stays here in the United States.
So we need to – there are ways, and there’s a lot of active work between the two programs for, for example, in the NOFO, one of the selection criteria is around contributions and participation in the R&D ecosystem. Now, that benefits the R&D program because of leading edge capabilities that could be made use for R&D. It’s not specified. That’s still in the negotiation stage. But as the R&D program has a responsibility that the returns of that investment from the innovation infrastructure that we provide, if we are not providing the leading-edge technology that the fabs and the manufacturers need or want, then we wouldn’t have fulfilled our part of the agreement. So that’s sort of – that’s the closed loop that goes around it.
Dr. Shivakumar: Thank you.
Dr. Lin: OK. Thank you very much.
Dr. Shivakumar: Well, thank you. I think that’s a great introduction to the next panel. And if you could – if the members of that panel could step forward, please. Thank you.
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